When using long cables with Xilinx I2C peripherals (xps_iic or axi_iic) the bus controller may behave unexpectedly. Sometimes it just hangs during send operation, and sometimes it starts generating SCL clock signal forever. The issue seems to be related to the signal reflection from the remote end of the cable. In the particular case it was solved by mounting 22 pF capacitors to ground on both I2C lines, close to the FPGA circuit.
Tag - issue
Saturday, December 22 2012
By Olek on Saturday, December 22 2012, 15:55